Abstract:Multicore processors have already became mainstream and are being widely applied in embedded devices. Current research on how operating systems support multicore processors has focus on tightly coupled and shared memory architecture, which is the most common architecture for multicore processors, but ignores other special memory architectures. In this paper, a new embedded multicore operating system model based on a single code and multiple data is proposed for memory-constrained and multi-level memory architectures. Experiments show that, when applied to an eight-core DSP based on a multi-level memory architecture, this model can efficiently reduce the code space overhead by 80% compared to AMP; and the time cost related to real-time is ten times lower than that on SMP.