Method of LLVM-Based RISC-V Custom Extended Instructions Support

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    The RISC-V instruction set architecture features modularization and scalability. On the basis of the integer instruction set, the RISC-V architecture based processors can optionally support the official standard and non-standard custom instruction set extensions. This also means that, for each new custom extended instruction set, users need to implement corresponding support in the compiler toolchain. After analyzing the LLVM compilation framework and researching the general methods supporting RISC-V custom extended instructions, we conduct the implementation and verification with the XuanTie C910 custom instruction set as an example. The results can provide references for the research and implementation of RISC-V custom instruction set extension based on LLVM infrastructure.

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  • Received:April 27,2021
  • Revised:May 21,2021
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  • Online: October 22,2021
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